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74LVX74M|ONSEMI|simage
74LVX74M|ONSEMI|limage
Flip Flops

74LVX74M

Flip Flop D-Type Pos-Edge 2-Element 14-Pin SOIC N Tube

onsemi
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Obsolete
  • HTS
    COMPONENTS
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    LVX
  • Logic Function
    D-Type
  • Number of Channels per Chip
    2
  • Number of Elements per Chip
    2
  • Number of Element Inputs
    1
  • Number of Element Outputs
    1
  • Bus Hold
    No
  • Set/Reset
    Set/Reset
  • Polarity
    Inverting/Non-Inverting
  • Triggering Type
    Positive-Edge
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    18.5@2.7V|13.2@3.3V
  • Absolute Propagation Delay Time (ns)
    19.1
  • Process Technology
    0.35um
  • Input Signal Type
    Single-Ended
  • Maximum Low Level Output Current (mA)
    4
  • Maximum High Level Output Current (mA)
    -4
  • Minimum Operating Supply Voltage (V)
    2
  • Typical Operating Supply Voltage (V)
    2.5|3.3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Maximum Quiescent Current (mA)
    0.002
  • Propagation Delay Test Condition (pF)
    50
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Packaging
    Tube
  • Mounting
    Surface Mount
  • Package Height
    1.5(Max) mm
  • Package Width
    4(Max) mm
  • Package Length
    8.75(Max) mm
  • PCB changed
    14
  • Standard Package Name
    SO
  • Supplier Package
    SOIC N
  • Pin Count
    14
  • Lead Shape
    Gull-wing

Documentation and Resources

Datasheets
Design resources