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74AUP1G11GF132|NEXPERIA|simage
74AUP1G11GF132|NEXPERIA|limage
Logic Gates

74AUP1G11GF,132

AND Gate 1-Element 3-IN 6-Pin XSON T/R

Nexperia
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Obsolete
  • HTS
    8542.39.00.90
  • SVHC
    Yes
  • Automotive
    Yes
  • PPAP
    Unknown
  • Logic Family
    AUP
  • Logic Function
    AND
  • Number of Elements per Chip
    1
  • Number of Element Inputs
    3-IN
  • Number of Output Enables per Element
    0
  • Number of Selection Inputs per Element
    0
  • Number of Element Outputs
    1
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    16.8@1.1V to 1.3V|10@1.4V to 1.6V|8.1@1.65V to 1.95V|6.6@2.3V to 2.7V|6.1@3V to 3.6V
  • Absolute Propagation Delay Time (ns)
    18.3
  • Maximum Low Level Output Current (mA)
    4
  • Maximum High Level Output Current (mA)
    -4
  • Minimum Operating Supply Voltage (V)
    0.8
  • Typical Operating Supply Voltage (V)
    1.8|2.5|3.3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Maximum Quiescent Current (uA)
    0.5
  • Propagation Delay Test Condition (pF)
    30
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    125
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    0.46(Max)
  • Package Width
    1.05(Max)
  • Package Length
    1.05(Max)
  • PCB changed
    6
  • Standard Package Name
    SON
  • Supplier Package
    XSON
  • Pin Count
    6

Documentation and Resources

Datasheets
Design resources