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5M80ZM64I5N|ALTERA|simage
5M80ZM64I5N|ALTERA|limage
Complex Programmable Logic Devices - CPLDs

5M80ZM64I5N

CPLD MAX® VFamily 64Macro Cells 118.3MHz 1.8V 64-Pin MBGA Tray

Altera
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    COMPONENTS
  • Automotive
    No
  • PPAP
    No
  • Family Name
    MAX® V
  • Logic Elements
    80
  • Program Memory Type
    Flash
  • Memory Size (Kbit)
    8
  • Number of Logic Blocks/Elements
    24
  • Number of Global Clocks
    4
  • Number of I/O Banks
    2
  • Number of Macro Cells
    64
  • Data Gate
    No
  • Maximum Number of User I/Os
    30
  • In-System Programmability
    Yes
  • Programmability
    Yes
  • Reprogrammability Support
    Yes
  • Maximum Internal Frequency (MHz)
    1474.9
  • Maximum Internal Frequency (MHz)
    118.3
  • Maximum Clock to Output Delay (ns)
    8.6
  • Maximum Propagation Delay Time (ns)
    14|8.5
  • Speed Grade
    5
  • Individual Output Enable Control
    Yes
  • Minimum Operating Supply Voltage (V)
    1.71
  • Maximum Operating Supply Voltage (V)
    1.89
  • Typical Operating Supply Voltage (V)
    1.8
  • I/O Voltage (V)
    1.2|1.5|1.8|2.5|3.3
  • Tolerant Configuration Interface Voltage (V)
    5
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    100
  • Supplier Temperature Grade
    Industrial
  • Packaging
    Tray
  • Tradename
    MAX
  • Mounting
    Surface Mount
  • Package Height
    0.85
  • Package Width
    4.5
  • Package Length
    4.5
  • PCB changed
    64
  • Standard Package Name
    BGA
  • Supplier Package
    MBGA
  • Pin Count
    64
  • Lead Shape
    Ball

Documentation and Resources

Datasheets
Design resources