Logic Gates

74LVC1G32GW,125

OR Gate 1-Element 2-IN 5-Pin TSSOP T/R

Nexperia

产品技术规范

• 欧盟RoHS指令

  Compliant

• 美国出口管制分类ECCN编码

  EAR99

• 环保无铅

  Active

• 美国海关商品代码

  8542.39.00.90

• SVHC

  Yes

• Automotive

  No

• PPAP

  No

• Logic Family

  LVC

• Logic Function

  OR

• Number of Elements per Chip

  1

• Number of Element Inputs

  2-IN

• Number of Output Enables per Element

  0

• Number of Selection Inputs per Element

  0

• Number of Element Outputs

  1

• Maximum Propagation Delay Time @ Maximum CL (ns)

  2.5(Typ)@2.7V|2.1(Typ)@3.3V|1.7(Typ)@5V

• Absolute Propagation Delay Time (ns)

  10.5

• Output Type

  Push-Pull

• Maximum Low Level Output Current (mA)

  32

• Maximum High Level Output Current (mA)

  -32

• Minimum Operating Supply Voltage (V)

  1.65

• Typical Operating Supply Voltage (V)

  1.8|2.5|3.3|5

• Maximum Operating Supply Voltage (V)

  5.5

• Typical Quiescent Current (uA)

  0.1

• Maximum Quiescent Current (uA)

  4

• Propagation Delay Test Condition (pF)

  50

• Minimum Operating Temperature (°C)

  -40

• Maximum Operating Temperature (°C)

  125

• Packaging

  Tape and Reel

• Mounting

  Surface Mount

• Package Height

  0.9

• Package Width

  1.25

• Package Length

  2

• PCB changed

  5

• Standard Package Name

  SO

• Supplier Package

  TSSOP

• Pin Count

  5

• Lead Shape

  Gull-wing