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SN54HC10J|TI|simage
SN54HC10J|TI|limage
Logic Gates

SN54HC10J

NAND Gate 3-Element 3-IN 14-Pin CDIP Tube

Texas Instruments

产品技术规范
  • EU RoHS
    Not Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    COMPONENTS
  • SVHC
    Yes
  • SVHC Exceeds Threshold
    Yes
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    HC
  • Logic Function
    NAND
  • Number of Elements per Chip
    3
  • Number of Element Inputs
    3-IN
  • Number of Output Enables per Element
    0
  • Number of Selection Inputs per Element
    0
  • Number of Element Outputs
    1
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    95@2V|19@4.5V|16@6V
  • Absolute Propagation Delay Time (ns)
    145
  • Output Type
    Push-Pull
  • Maximum Low Level Output Current (mA)
    5.2
  • Maximum High Level Output Current (mA)
    -5.2
  • Minimum Operating Supply Voltage (V)
    2
  • Typical Operating Supply Voltage (V)
    5
  • Maximum Operating Supply Voltage (V)
    6
  • Maximum Quiescent Current (uA)
    2
  • Propagation Delay Test Condition (pF)
    50
  • Minimum Operating Temperature (°C)
    -55
  • Maximum Operating Temperature (°C)
    125
  • Supplier Temperature Grade
    Military
  • Packaging
    Tube
  • Mounting
    Through Hole
  • Package Height
    3.56(Max)
  • Package Width
    7.19(Max)
  • Package Length
    19.94(Max)
  • PCB changed
    14
  • Standard Package Name
    DIP
  • Supplier Package
    CDIP
  • Pin Count
    14
  • Lead Shape
    Through Hole

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