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74HC132PWQ100118|NEXPERIA|simage
74HC132PWQ100118|NEXPERIA|limage
Logic Gates

74HC132PW-Q100,118

NAND Gate 4-Element 2-IN 14-Pin TSSOP T/R Automotive AEC-Q100

Nexperia
数据表 

产品技术规范
  • 欧盟RoHS指令
    Compliant
  • 美国出口管制分类ECCN编码
    EAR99
  • 环保无铅
    Active
  • 美国海关商品代码
    8542.39.00.90
  • Automotive
    Yes
  • PPAP
    Unknown
  • Logic Family
    HC
  • Logic Function
    NAND
  • Number of Elements per Chip
    4
  • Number of Element Inputs
    2-IN
  • Number of Output Enables per Element
    0
  • Number of Selection Inputs per Element
    0
  • Number of Element Outputs
    1
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    125@2V|25@4.5V|21@6V
  • Absolute Propagation Delay Time (ns)
    190
  • Input Type
    Schmitt Trigger
  • Maximum Low Level Output Current (mA)
    5.2
  • Maximum High Level Output Current (mA)
    -5.2
  • Minimum Operating Supply Voltage (V)
    2
  • Typical Operating Supply Voltage (V)
    5
  • Maximum Operating Supply Voltage (V)
    6
  • Maximum Quiescent Current (uA)
    2
  • Propagation Delay Test Condition (pF)
    50
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    125
  • Supplier Temperature Grade
    Automotive
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    1.05(Max) mm
  • Package Width
    4.5(Max) mm
  • Package Length
    5.1(Max) mm
  • PCB changed
    14
  • Standard Package Name
    SO
  • Supplier Package
    TSSOP
  • Pin Count
    14

文档和资源

数据表
设计资源