Complex Programmable Logic Devices - CPLDs

EPM9400LC84-15

CPLD MAX® 9000Family 8KGates 400Macro Cells 117.6MHz 5V 84-Pin PLCC

Altera

제품 기술 사양

• RoHS (Unione Europea)

  Not Compliant

• ECCN (Stati Uniti)

  EAR99

• Stato del componente

  Obsolete

• Codice HTS

  COMPONENTS

• Automotive

  No

• PPAP

  No

• Family Name

  MAX® 9000

• Program Memory Type

  EEPROM

• Number of Logic Blocks/Elements

  25

• Number of Global Clocks

  2

• Number of Macro Cells

  400

• Process Technology

  0.65um

• Product Terms

  32

• Device System Gates

  8000

• Data Gate

  No

• Maximum Number of User I/Os

  59

• Number of Flip Flops

  580

• In-System Programmability

  Yes

• Programmability

  Yes

• Reprogrammability Support

  Yes

• Maximum Internal Frequency (MHz)

  117.6

• Maximum Clock to Output Delay (ns)

  7

• Maximum Propagation Delay Time (ns)

  15|16.2

• Speed Grade

  15

• Individual Output Enable Control

  Yes

• Minimum Operating Supply Voltage (V)

  4.75

• Maximum Operating Supply Voltage (V)

  5.25

• Typical Operating Supply Voltage (V)

  5

• I/O Voltage (V)

  3.3|5

• Minimum Operating Temperature (°C)

  0

• Maximum Operating Temperature (°C)

  70

• Supplier Temperature Grade

  Commercial

• Tradename

  MAX

• Mounting

  Surface Mount

• Package Height

  3.81

• Package Width

  29.31

• Package Length

  29.31

• PCB changed

  84

• Standard Package Name

  LCC

• Supplier Package

  PLCC

• Pin Count

  84

• Lead Shape

  J-Lead