필드 프로그래머블 게이트 어레이 - FPGA
EP2S30F672C5
FPGA Stratix® IIFamily 33880Cells 609.76MHz 1.2V 672-Pin FC-FBGA Tray
Altera제품 기술 사양
유럽 연합 RoHS 명령어
Not Compliant
미국수출통제분류ECCN 인코딩
3A991d.
친환경 무연
Obsolete
미국 세관 상품 코드
COMPONENTS
SVHC
Yes
SVHC 기준 초과
Yes
Automotive
No
PPAP
No
Family Name
Stratix® II
Process Technology
90nm
User I/Os
500
Number of I/O Banks
8
Operating Supply Voltage (V)
1.2
Shift Registers
Utilize Memory
Logic Elements
33880
Number of Multipliers
64 (18x18)
Program Memory Type
SRAM
Embedded Memory (Kbit)
1337.6
Total Number of Block RAM
1+144+202
IP Core
32/64-bit PCI-X bus Master/Target interface Core, 66/100/133Mhz|PowerPC/SH/1960 System Controller|RapidIO to AXI Bridge Controller (RAB)|Viterbi Compiler, High-Speed Parallel Decoder
Provider Name
Altera/CAST, Inc/Barco Silex/Mobiveil, Inc/Eureka Technology Inc/PLDA
Device Logic Units
33880
Number of Global Clocks
16
Device Number of DLLs/PLLs
6
Dedicated DSP
16
Programmability
No
Reprogrammability Support
No
Copy Protection
No
Opr. Frequency (MHz)
609.76
In-System Programmability
Yes
Speed Grade
5
GMACs
16.8
Mega Multiply Accumulates per second
16800
Differential I/O Standards
LVDS|LVPECL
Single-Ended I/O Standards
HSTL|SSTL|CMOS|LVTTL
Maximum I/O Performance
1Gbps
External Memory Interface
QDRII+SRAM|RLDRAM II|DDR2 SDRAM|DDR SDRAM
Minimum Operating Supply Voltage (V)
1.15
Maximum Operating Supply Voltage (V)
1.25
I/O Voltage (V)
1.5|1.8|2.5|3.3
Minimum Operating Temperature (°C)
0
Maximum Operating Temperature (°C)
85
Supplier Temperature Grade
Commercial
Packaging
Tray
Tradename
Stratix
Mounting
Surface Mount
Package Height
3(Max)
Package Width
27
Package Length
27
PCB changed
672
Standard Package Name
BGA
Supplier Package
FC-FBGA
Pin Count
672
Lead Shape
Ball