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74LVC2G86DP125|NEXPERIA|simage
74LVC2G86DP125|NEXPERIA|limage
Logic Gates

74LVC2G86DP,125

XOR Gate 2-Element 2-IN 8-Pin TSSOP T/R

Nexperia
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제품 기술 사양
  • RoHS (Unión Europea)
    Compliant
  • ECCN (Estados Unidos)
    EAR99
  • Estatus de pieza
    Active
  • Código HTS
    COMPONENTS
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    LVC
  • Logic Function
    XOR
  • Number of Elements per Chip
    2
  • Number of Element Inputs
    2-IN
  • Number of Output Enables per Element
    0
  • Number of Selection Inputs per Element
    0
  • Number of Element Outputs
    1
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    3(Typ)@2.7V|2.3(Typ)@3.3V|1.9(Typ)@5V
  • Absolute Propagation Delay Time (ns)
    12.4
  • Output Type
    Push-Pull
  • Maximum Low Level Output Current (mA)
    32
  • Maximum High Level Output Current (mA)
    -32
  • Minimum Operating Supply Voltage (V)
    1.65
  • Typical Operating Supply Voltage (V)
    1.8|2.5|3.3|5
  • Maximum Operating Supply Voltage (V)
    5.5
  • Typical Quiescent Current (uA)
    0.1
  • Maximum Quiescent Current (uA)
    40
  • Propagation Delay Test Condition (pF)
    50
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    125
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    0.95(Max)
  • Package Width
    3.1(Max)
  • Package Length
    3.1(Max)
  • PCB changed
    8
  • Standard Package Name
    SO
  • Supplier Package
    TSSOP
  • Pin Count
    8
  • Lead Shape
    Gull-wing

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