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LCMXO2256HC4SG32C|LATTICE|simage
LCMXO2256HC4SG32C|LATTICE|limage
Field Programmable Gate Arrays - FPGAs

LCMXO2-256HC-4SG32C

FPGA MachXO2Family 256Cells 2.5V/3.3V 32-Pin QFN EP Tray

Lattice Semiconductor
Schede tecniche 

Specifiche Tecniche del Prodotto
  • RoHS (Unione Europea)
    Compliant
  • ECCN (Stati Uniti)
    EAR99
  • Stato del componente
    Active
  • Codice HTS
    COMPONENTS
  • Automotive
    No
  • PPAP
    No
  • Family Name
    MachXO2
  • Process Technology
    65nm
  • User I/Os
    21
  • Number of I/O Banks
    4
  • Operating Supply Voltage (V)
    2.5, 3.3
  • Shift Registers
    Utilize Memory
  • Logic Elements
    256
  • Program Memory Type
    SRAM
  • Maximum Distributed RAM Bits
    2048
  • Device Logic Units
    256
  • Reprogrammability Support
    No
  • In-System Programmability
    No
  • Speed Grade
    4
  • Maximum Differential I/O Pairs
    10
  • Minimum Operating Supply Voltage (V)
    2.375
  • Maximum Operating Supply Voltage (V)
    3.6
  • I/O Voltage (V)
    1.2, 1.5, 1.8, 2.5, 3.3
  • Minimum Operating Temperature (°C)
    0
  • Maximum Operating Temperature (°C)
    85
  • Supplier Temperature Grade
    Commercial
  • Packaging
    Tray
  • Mounting
    Surface Mount
  • Package Height
    0.84
  • Package Width
    5
  • Package Length
    5
  • PCB changed
    32
  • Standard Package Name
    QFN
  • Supplier Package
    QFN EP
  • Pin Count
    32
  • Lead Shape
    No Lead
  • Family/Series
    LCMXO2-256
  • ROHS Version
    2011/65/EU, 2015/863
  • Quantity Packaging
    490
  • MSL
    3
Quantità Ordine

Documentazione e Risorse

Schede tecniche
Risorse di progettazione