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IS64LF12836EC7.5B3LA3TR|ISSI|simage
IS64LF12836EC7.5B3LA3TR|ISSI|limage
Chip SRAM

IS64LF12836EC-7.5B3LA3-TR

SRAM Chip Sync Quad 3.3V 4M-bit 128K x 36 7.5ns Automotive AEC-Q100 165-Pin BGA T/R

Integrated Silicon Solution Inc
Datasheets 

Product Technical Specifications
  • RoHS (Unione Europea)
    Compliant
  • ECCN (Stati Uniti)
    EAR99
  • Stato del componente
    Active
  • Codice HTS
    8542.32.00.41
  • Automotive
    Yes
  • PPAP
    Yes
  • Chip Density (bit)
    4M
  • Number of Words
    128K
  • Number of Bits/Word (bit)
    36
  • Architecture
    Flow-Through
  • Data Rate Architecture
    SDR
  • Address Bus Width (bit)
    17
  • Number of Ports
    4
  • Timing Type
    Synchronous
  • Max. Access Time (ns)
    7.5
  • Maximum Clock Rate (MHz)
    117
  • Minimum Operating Supply Voltage (V)
    3.135
  • Typical Operating Supply Voltage (V)
    3.3
  • Maximum Operating Supply Voltage (V)
    3.465
  • Operating Current (mA)
    175
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    125
  • Supplier Temperature Grade
    Automotive
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    0.79
  • Package Width
    13
  • Package Length
    15
  • PCB changed
    165
  • Standard Package Name
    BGA
  • Supplier Package
    BGA
  • Pin Count
    165
  • Lead Shape
    Ball

Documentation and Resources

Datasheets
Design resources