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Chip SRAM

IS61QDPB41M36A1-400B4LI

36MB Quad Synchronous SRAM

Integrated Silicon Solution Inc
Schede tecniche 

Specifiche Tecniche del Prodotto
  • RoHS (Unione Europea)
    Compliant
  • ECCN (Stati Uniti)
    3A991b.2.a.
  • Stato del componente
    Active
  • Codice HTS
    8542.32.00.41
  • Automotive
    No
  • PPAP
    No
  • Chip Density (bit)
    36M
  • Number of Words
    1M
  • Number of Bits/Word (bit)
    36
  • Architecture
    Pipelined
  • Data Rate Architecture
    DDR
  • Address Bus Width (bit)
    18
  • Number of Ports
    2
  • Timing Type
    Synchronous
  • Max. Access Time (ns)
    0.45
  • Mounting
    Surface Mount
  • Package Height
    1(Max)
  • Package Width
    13
  • Package Length
    15
  • PCB changed
    165
  • Standard Package Name
    BGA
  • Supplier Package
    LFBGA
  • Pin Count
    165

Documentazione e Risorse

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Risorse di progettazione