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TC7SET32FU5LJFT|TOSHIBA|limage
TC7SET32FU5LJFT|TOSHIBA|simage
Logic Gates

TC7SET32FU(5L,JF,T

OR Gate 1-Element 2-IN 5-Pin USV Automotive AEC-Q100

Toshiba
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Obsolete
  • Automotive
    Yes
  • PPAP
    Unknown
  • Logic Family
    7SET
  • Logic Function
    OR
  • Number of Elements per Chip
    1
  • Number of Element Inputs
    2-IN
  • Number of Output Enables per Element
    0
  • Number of Selection Inputs per Element
    0
  • Number of Element Outputs
    1
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    9@5V
  • Absolute Propagation Delay Time (ns)
    10.3
  • Output Type
    Push-Pull
  • Maximum Low Level Output Current (mA)
    8
  • Maximum High Level Output Current (mA)
    -8
  • Minimum Operating Supply Voltage (V)
    4.5
  • Typical Operating Supply Voltage (V)
    5
  • Maximum Operating Supply Voltage (V)
    5.5
  • Maximum Quiescent Current (uA)
    2
  • Propagation Delay Test Condition (pF)
    50
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Mounting
    Surface Mount
  • Package Height
    0.9 mm
  • Package Width
    1.25 mm
  • Package Length
    2 mm
  • PCB changed
    5
  • Standard Package Name
    SOT
  • Supplier Package
    USV
  • Pin Count
    5
  • Lead Shape
    Gull-wing

Documentation and Resources

Datasheets
Design resources