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M4A338419210FANC|LATTICE|simage
M4A338419210FANC|LATTICE|limage
CPLD

M4A3-384/192-10FANC

CPLD ispMACH 4AFamily 15KGates 384Macro Cells 83.3MHz/118MHz 3.3V 256-Pin FBGA Tray

Lattice Semiconductor
Datasheets 

Product Technical Specifications
  • RoHS (Unione Europea)
    Compliant
  • ECCN (Stati Uniti)
    EAR99
  • Stato del componente
    Obsolete
  • Codice HTS
    8542.31.00.55
  • Automotive
    No
  • PPAP
    No
  • Family Name
    ispMACH 4A
  • Program Memory Type
    EEPROM
  • Number of Global Clocks
    4
  • Number of Macro Cells
    384
  • Product Terms
    20
  • Device System Gates
    15000
  • Data Gate
    No
  • Maximum Number of User I/Os
    192
  • Number of Flip Flops
    576
  • In-System Programmability
    Yes
  • Programmability
    Yes
  • Reprogrammability Support
    Yes
  • Maximum Internal Frequency (MHz)
    100|125
  • Maximum Internal Frequency (MHz)
    83.3|118
  • Maximum Clock to Output Delay (ns)
    11|6
  • Maximum Propagation Delay Time (ns)
    10
  • Speed Grade
    10
  • Individual Output Enable Control
    Yes
  • Minimum Operating Supply Voltage (V)
    3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Typical Operating Supply Voltage (V)
    3.3
  • Tolerant Configuration Interface Voltage (V)
    5
  • Minimum Operating Temperature (°C)
    0
  • Maximum Operating Temperature (°C)
    70
  • Supplier Temperature Grade
    Commercial
  • Packaging
    Tray
  • Tradename
    ispMACH
  • Mounting
    Surface Mount
  • Package Height
    1.2
  • Package Width
    17
  • Package Length
    17
  • PCB changed
    256
  • Standard Package Name
    BGA
  • Supplier Package
    FBGA
  • Pin Count
    256
  • Lead Shape
    Ball

Documentation and Resources

Datasheets
Design resources