CPLD
ISPLSI 2064VE-135LB100
CPLD ispLSI® 2000VEFamily 2KGates 64Macro Cells 135MHz 3.3V 100-Pin CABGA
Lattice SemiconductorSpecifiche Tecniche del Prodotto
RoHS (Unione Europea)
Not Compliant
Stato del componente
Obsolete
Codice HTS
COMPONENTS
SVHC
Yes
Tasso di SVHC superiore ai limiti consentiti
Yes
Automotive
No
PPAP
No
Family Name
ispLSI® 2000VE
Program Memory Type
ROMLess
Number of Logic Blocks/Elements
16
Number of Global Clocks
3
Number of Macro Cells
64
Device System Gates
2000
Data Gate
No
Maximum Number of User I/Os
64
Number of Flip Flops
64
In-System Programmability
Yes
Programmability
Yes
Reprogrammability Support
Yes
Programmable Type
In System Programmable
Maximum Internal Frequency (MHz)
135(Min)
Maximum Internal Frequency (MHz)
135(Min)
Maximum Clock to Output Delay (ns)
4
Maximum Propagation Delay Time (ns)
7.5
Speed Grade
135
Individual Output Enable Control
No
Minimum Operating Supply Voltage (V)
3
Maximum Operating Supply Voltage (V)
3.6
Typical Operating Supply Voltage (V)
3.3
Maximum Supply Current (mA)
90(Typ)
Minimum Operating Temperature (°C)
0
Maximum Operating Temperature (°C)
70
Supplier Temperature Grade
Commercial
Tradename
ispLSI
Mounting
Surface Mount
Package Height
1.04
Package Width
10
Package Length
10
PCB changed
100
Standard Package Name
BGA
Supplier Package
CABGA
Pin Count
100
Lead Shape
Ball