CPLD

ISPLSI 1024EA-100LT100

CPLD ispLSI® 1000EAFamily 4KGates 64Macro Cells 100MHz 5V 100-Pin TQFP

Lattice Semiconductor

Specifiche Tecniche del Prodotto

• RoHS (Unione Europea)

  Not Compliant

• Stato del componente

  Obsolete

• Codice HTS

  COMPONENTS

• SVHC

  Yes

• Tasso di SVHC superiore ai limiti consentiti

  Yes

• Automotive

  No

• PPAP

  No

• Family Name

  ispLSI® 1000EA

• Program Memory Type

  ROMLess

• Number of Logic Blocks/Elements

  24

• Number of Global Clocks

  4

• Number of Macro Cells

  64

• Device System Gates

  4000

• Data Gate

  No

• Maximum Number of User I/Os

  48

• Number of Flip Flops

  144

• In-System Programmability

  Yes

• Programmability

  Yes

• Reprogrammability Support

  Yes

• Maximum Internal Frequency (MHz)

  125

• Maximum Internal Frequency (MHz)

  100

• Maximum Clock to Output Delay (ns)

  7

• Maximum Propagation Delay Time (ns)

  10

• Speed Grade

  100

• Individual Output Enable Control

  No

• Minimum Operating Supply Voltage (V)

  4.75

• Maximum Operating Supply Voltage (V)

  5.25

• Typical Operating Supply Voltage (V)

  5

• I/O Voltage (V)

  3.3|5

• Maximum Supply Current (mA)

  152(Typ)

• Minimum Operating Temperature (°C)

  0

• Maximum Operating Temperature (°C)

  70

• Supplier Temperature Grade

  Commercial

• Tradename

  ispLSI

• Mounting

  Surface Mount

• Package Height

  1.4

• Package Width

  14

• Package Length

  14

• PCB changed

  100

• Standard Package Name

  QFP

• Supplier Package

  TQFP

• Pin Count

  100

• Lead Shape

  Gull-wing