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IS62WV2568BLL55HLI|ISSI|simage
IS62WV2568BLL55HLI|ISSI|limage
Chip SRAM

IS62WV2568BLL-55HLI

SRAM Chip Async Single 3.3V 2M-bit 256K x 8 55ns 32-Pin STSOP-I

Integrated Silicon Solution Inc
Schede tecniche 

Specifiche Tecniche del Prodotto
  • RoHS (Unione Europea)
    Compliant
  • ECCN (Stati Uniti)
    3A991b.2.a.
  • Stato del componente
    Active
  • Codice HTS
    8542.32.00.41
  • Automotive
    No
  • PPAP
    No
  • Chip Density (bit)
    2M
  • Number of Words
    256K
  • Number of Bits/Word (bit)
    8
  • Data Rate Architecture
    SDR
  • Address Bus Width (bit)
    18
  • Number of Ports
    1
  • Timing Type
    Asynchronous
  • Max. Access Time (ns)
    55
  • Minimum Operating Supply Voltage (V)
    2.5
  • Typical Operating Supply Voltage (V)
    3.3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Operating Current (mA)
    15
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Supplier Temperature Grade
    Industrial
  • Mounting
    Surface Mount
  • Package Height
    1.05(Max) mm
  • Package Width
    11.9(Max) mm
  • Package Length
    8.1(Max) mm
  • PCB changed
    32
  • Standard Package Name
    SO
  • Supplier Package
    STSOP-I
  • Pin Count
    32
  • Lead Shape
    Gull-wing

Documentazione e Risorse

Schede tecniche
Risorse di progettazione