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74LVC00AD112|NEXPERIA|limage
74LVC00AD112|NEXPERIA|simage
Logic Gates

74LVC00AD,112

NAND Gate 4-Element 2-IN 14-Pin SO Tube

Nexperia
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Obsolete
  • HTS
    COMPONENTS
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    LVC
  • Logic Function
    NAND
  • Number of Elements per Chip
    4
  • Number of Element Inputs
    2-IN
  • Number of Output Enables per Element
    0
  • Number of Selection Inputs per Element
    0
  • Number of Element Outputs
    1
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    2.3(Typ)@2.7V|2(Typ)@3.3V
  • Absolute Propagation Delay Time (ns)
    9.7
  • Output Type
    Push-Pull
  • Maximum Low Level Output Current (mA)
    24
  • Maximum High Level Output Current (mA)
    -24
  • Minimum Operating Supply Voltage (V)
    1.2
  • Typical Operating Supply Voltage (V)
    1.8|2.5|3.3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Typical Quiescent Current (uA)
    0.1
  • Maximum Quiescent Current (uA)
    40
  • Propagation Delay Test Condition (pF)
    50
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    125
  • Packaging
    Tube
  • Mounting
    Surface Mount
  • Package Height
    1.5(Max)
  • Package Width
    4(Max)
  • Package Length
    8.75(Max)
  • PCB changed
    14
  • Standard Package Name
    SO
  • Supplier Package
    SO
  • Pin Count
    14
  • Lead Shape
    Gull-wing

Documentation and Resources

Datasheets
Design resources