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SN74LS26N|TI|simage
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Logic Gates

SN74LS26N

NAND Gate 4-Element 2-IN 14-Pin PDIP Tube

Texas Instruments

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    8542.39.00.90
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    LS
  • Logic Function
    NAND
  • Number of Elements per Chip
    4
  • Number of Element Inputs
    2-IN
  • Number of Output Enables per Element
    0
  • Number of Selection Inputs per Element
    0
  • Number of Element Outputs
    1
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    32@5V
  • Absolute Propagation Delay Time (ns)
    32
  • Output Type
    Open Collector
  • Maximum Low Level Output Current (mA)
    8
  • Maximum High Level Output Current (mA)
    -1
  • Minimum Operating Supply Voltage (V)
    4.75
  • Typical Operating Supply Voltage (V)
    5
  • Maximum Operating Supply Voltage (V)
    5.25
  • Propagation Delay Test Condition (pF)
    15
  • Minimum Operating Temperature (°C)
    0
  • Maximum Operating Temperature (°C)
    70
  • Supplier Temperature Grade
    Commercial
  • Packaging
    Tube
  • Mounting
    Through Hole
  • Package Height
    5.08(Max) - 0.51(Min)
  • Package Width
    6.35
  • Package Length
    19.31
  • PCB changed
    14
  • Standard Package Name
    DIP
  • Supplier Package
    PDIP
  • Pin Count
    14
  • Lead Shape
    Through Hole

Documentation and Resources

Datasheets
Design resources