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SN74LS107AD|TI|simage
SN74LS107AD|TI|limage
Flip Flops

SN74LS107AD

Flip Flop JK-Type Neg-Edge 2-Element 14-Pin SOIC Tube

Texas Instruments

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    8542.39.00.90
  • SVHC
    Yes
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    LS
  • Logic Function
    JK-Type
  • Number of Channels per Chip
    2
  • Number of Elements per Chip
    2
  • Number of Element Inputs
    2
  • Number of Element Outputs
    1
  • Bus Hold
    No
  • Set/Reset
    Reset
  • Polarity
    Inverting/Non-Inverting
  • Triggering Type
    Negative-Edge
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    20@5V
  • Absolute Propagation Delay Time (ns)
    20
  • Input Signal Type
    Single-Ended
  • Maximum Low Level Output Current (mA)
    8
  • Maximum High Level Output Current (mA)
    -0.4
  • Minimum Operating Supply Voltage (V)
    4.75
  • Typical Operating Supply Voltage (V)
    5
  • Maximum Operating Supply Voltage (V)
    5.25
  • Maximum Quiescent Current (mA)
    4(Typ)
  • Propagation Delay Test Condition (pF)
    15
  • Minimum Operating Temperature (°C)
    0
  • Maximum Operating Temperature (°C)
    70
  • Supplier Temperature Grade
    Commercial
  • Packaging
    Tube
  • Mounting
    Surface Mount
  • Package Height
    1.5(Max)
  • Package Width
    3.9
  • Package Length
    8.65
  • PCB changed
    14
  • Standard Package Name
    SO
  • Supplier Package
    SOIC
  • Pin Count
    14
  • Lead Shape
    Gull-wing

Documentation and Resources

Datasheets
Design resources