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SN74AUP2G240RSER|TI|simage
SN74AUP2G240RSER|TI|limage
Buffers and Line Drivers

SN74AUP2G240RSER

Buffer/Line Driver 2-CH Inverting 3-ST 8-Pin UQFN T/R

Texas Instruments

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    8542.39.00.90
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    AUP
  • Logic Function
    Buffer/Line Driver
  • Number of Elements per Chip
    2
  • Number of Channels per Chip
    2
  • Number of Inputs per Chip
    2
  • Number of Input Enables per Chip
    0
  • Number of Outputs per Chip
    2
  • Number of Output Enables per Chip
    2 Low
  • Bus Hold
    No
  • Polarity
    Inverting
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    11@1.8V|7.6@2.5V|6.2@3.3V|20.9@1.2V|14.2@1.5V
  • Absolute Propagation Delay Time (ns)
    25.5
  • Input Signal Type
    Single-Ended
  • Output Type
    3-State
  • Maximum Low Level Output Current (mA)
    4
  • Maximum High Level Output Current (mA)
    -4
  • Minimum Operating Supply Voltage (V)
    0.8
  • Typical Operating Supply Voltage (V)
    1.8|2.5|3.3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Tolerant I/Os (V)
    3.6
  • Maximum Quiescent Current (uA)
    0.5
  • Propagation Delay Test Condition (pF)
    30
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    0.55(Max)
  • Package Width
    1.55(Max)
  • Package Length
    1.55(Max)
  • PCB changed
    8
  • Standard Package Name
    QFN
  • Supplier Package
    UQFN
  • Pin Count
    8
  • Lead Shape
    No Lead

Documentation and Resources

Datasheets
Design resources