Buffers and Line Drivers

SN74AUP1G240YFPR

Buffer/Line Driver 1-CH Inverting 3-ST 6-Pin DSBGA T/R

Texas Instruments

Product Technical Specifications

• EU RoHS

  Compliant

• ECCN (US)

  EAR99

• Part Status

  Obsolete

• HTS

  SN74AUP1G240YFPR

• Automotive

  No

• PPAP

  No

• Logic Family

  AUP

• Logic Function

  Buffer/Line Driver

• Number of Elements per Chip

  1

• Number of Channels per Chip

  1

• Number of Inputs per Chip

  1

• Number of Input Enables per Chip

  0

• Number of Outputs per Chip

  1

• Number of Output Enables per Chip

  1 Low

• Bus Hold

  No

• Polarity

  Inverting

• Maximum Propagation Delay Time @ Maximum CL (ns)

  16.1@1.2V|11@1.5V|9.2@1.8V|6.8@2.5V|5.7@3.3V

• Absolute Propagation Delay Time (ns)

  27.4

• Input Signal Type

  Single-Ended

• Output Type

  3-State

• Maximum Low Level Output Current (mA)

  4

• Maximum High Level Output Current (mA)

  -4

• Minimum Operating Supply Voltage (V)

  0.8

• Typical Operating Supply Voltage (V)

  1.8|2.5|3.3

• Maximum Operating Supply Voltage (V)

  3.6

• Tolerant I/Os (V)

  3.6

• Maximum Quiescent Current (uA)

  0.5

• Propagation Delay Test Condition (pF)

  30

• Minimum Operating Temperature (°C)

  -40

• Maximum Operating Temperature (°C)

  85

• Packaging

  Tape and Reel

• Mounting

  Surface Mount

• Package Height

  0.31(Max)

• Package Width

  0.79(Max)

• Package Length

  1.19(Max)

• PCB changed

  6

• Standard Package Name

  BGA

• Supplier Package

  DSBGA

• Pin Count

  6

• Lead Shape

  Ball