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SN74ALVCH16973DGGR|TI|simage
SN74ALVCH16973DGGR|TI|limage
Bus Transceivers

SN74ALVCH16973DGGR

Bus XCVR Single 8-CH 3-ST 48-Pin TSSOP T/R

Texas Instruments

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    8542.39.00.90
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    ALVC
  • Logic Function
    Bus Transceiver/Latch
  • Data Flow Direction
    Bi-Directional
  • Number of Elements per Chip
    1
  • Number of Channels per Chip
    8
  • Number of Selection Inputs per Element
    0
  • Number of Output Enables per Element
    2 Low
  • Number of Input Enables per Element
    1 High
  • Number of Direction Control Inputs
    1 Low/High
  • Bus Hold
    Yes
  • Polarity
    Non-Inverting
  • Absolute Propagation Delay Time (ns)
    4.9
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    3@3.3V
  • Propagation Delay Test Condition (pF)
    50
  • Input Level
    LVTTL|TTL
  • Output Level
    LVCMOS
  • Output Type
    3-State
  • Maximum Low Level Output Current (mA)
    24
  • Maximum High Level Output Current (mA)
    -24
  • Maximum Quiescent Current (uA)
    30
  • Minimum Operating Supply Voltage (V)
    1.65
  • Maximum Operating Supply Voltage (V)
    3.6
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Supplier Temperature Grade
    Commercial
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    1.05(Max)
  • Package Width
    6.1
  • Package Length
    12.5
  • PCB changed
    48
  • Standard Package Name
    SO
  • Supplier Package
    TSSOP
  • Pin Count
    48
  • Lead Shape
    Gull-wing

Documentation and Resources

Datasheets
Design resources