Flip Flops
SN74ALVCH16823DGGR
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 2-Element 56-Pin TSSOP T/R
Texas InstrumentsProduct Technical Specifications
EU RoHS
Compliant
ECCN (US)
EAR99
Part Status
Active
HTS
8542.39.00.90
SVHC
Yes
Automotive
No
PPAP
No
Logic Family
ALVC
Logic Function
D-Type Bus Interface
Number of Channels per Chip
18
Number of Elements per Chip
2
Number of Element Inputs
9
Number of Element Outputs
9
Number of Output Enables per Element
1
Bus Hold
Yes
Set/Reset
Master Reset
Polarity
Non-Inverting
Triggering Type
Positive-Edge
Maximum Propagation Delay Time @ Maximum CL (ns)
3.5@3.3V
Absolute Propagation Delay Time (ns)
6
Input Signal Type
Single-Ended
Output Type
3-State
Maximum Low Level Output Current (mA)
24
Maximum High Level Output Current (mA)
-24
Minimum Operating Supply Voltage (V)
1.65
Typical Operating Supply Voltage (V)
1.8|2.5|3.3
Maximum Operating Supply Voltage (V)
3.6
Maximum Quiescent Current (mA)
0.04
Propagation Delay Test Condition (pF)
30
Minimum Operating Temperature (°C)
-40
Maximum Operating Temperature (°C)
85
Supplier Temperature Grade
Commercial
Packaging
Tape and Reel
Mounting
Surface Mount
Package Height
1.05(Max) mm
Package Width
6.2(Max) mm
Package Length
14.1(Max) mm
PCB changed
56
Standard Package Name
SO
Supplier Package
TSSOP
Pin Count
56
Lead Shape
Gull-wing

