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SN54LS08J|TI|simage
SN54LS08J|TI|limage
Logic Gates

SN54LS08J

AND Gate 4-Element 2-IN 14-Pin CDIP Tube

Texas Instruments

Product Technical Specifications
  • EU RoHS
    Not Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    COMPONENTS
  • SVHC
    Yes
  • SVHC Exceeds Threshold
    Yes
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    LS
  • Logic Function
    AND
  • Number of Elements per Chip
    4
  • Number of Element Inputs
    2-IN
  • Number of Output Enables per Element
    0
  • Number of Selection Inputs per Element
    0
  • Number of Element Outputs
    1
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    20@5V
  • Absolute Propagation Delay Time (ns)
    20
  • Output Type
    Push-Pull
  • Maximum Low Level Output Current (mA)
    4
  • Maximum High Level Output Current (mA)
    -0.4
  • Minimum Operating Supply Voltage (V)
    4.5
  • Typical Operating Supply Voltage (V)
    5
  • Maximum Operating Supply Voltage (V)
    5.5
  • Propagation Delay Test Condition (pF)
    15
  • Minimum Operating Temperature (°C)
    -55
  • Maximum Operating Temperature (°C)
    125
  • Supplier Temperature Grade
    Military
  • Packaging
    Tube
  • Mounting
    Through Hole
  • Package Height
    3.56(Max)
  • Package Width
    7.19(Max)
  • Package Length
    19.94(Max)
  • PCB changed
    14
  • Standard Package Name
    DIP
  • Supplier Package
    CDIP
  • Pin Count
    14
  • Lead Shape
    Through Hole

Documentation and Resources

Datasheets
Design resources