Flip Flops
JM38510/05152BEA
Flip Flop JK-Master-Slave Type Pos-Edge 2-Element 16-Pin CDIP Tube
Texas InstrumentsProduct Technical Specifications
EU RoHS
Not Compliant
ECCN (US)
EAR99
Part Status
Active
HTS
8542.39.00.70
SVHC
Yes
SVHC Exceeds Threshold
Yes
Automotive
No
PPAP
No
Logic Family
CD4000
Logic Function
JK-Master-Slave Type
Number of Channels per Chip
2
Number of Elements per Chip
2
Number of Element Inputs
2
Number of Element Outputs
1
Bus Hold
No
Set/Reset
Set/Reset
Polarity
Inverting/Non-Inverting
Triggering Type
Positive-Edge
Maximum Propagation Delay Time @ Maximum CL (ns)
300@5V|130@10V|90@15V
Absolute Propagation Delay Time (ns)
400
Input Signal Type
Single-Ended
Maximum Low Level Output Current (mA)
4.2(Min)
Maximum High Level Output Current (mA)
-4.2(Min)
Minimum Operating Supply Voltage (V)
3
Typical Operating Supply Voltage (V)
3.3|5|9|12|15
Maximum Operating Supply Voltage (V)
18
Maximum Quiescent Current (mA)
0.02
Propagation Delay Test Condition (pF)
50
Minimum Operating Temperature (°C)
-55
Maximum Operating Temperature (°C)
125
Supplier Temperature Grade
Military
Packaging
Tube
Mounting
Through Hole
Package Height
3.56(Max)
Package Width
7.62(Max)
Package Length
21.34(Max)
PCB changed
16
Standard Package Name
DIP
Supplier Package
CDIP
Pin Count
16
Lead Shape
Through Hole

