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IS62WVS5128GBLL45NLITR|ISSI|simage
IS62WVS5128GBLL45NLITR|ISSI|limage
SRAM Chip

IS62WVS5128GBLL-45NLI-TR

SRAM Chip Sync Single 3.3V 4M-bit 512K x 8 15ns 8-Pin SOIC N

Integrated Silicon Solution Inc
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    3A991.b.2.a
  • Part Status
    Active
  • HTS
    8542.32.00.41
  • Automotive
    No
  • PPAP
    No
  • Chip Density (bit)
    4M
  • Number of Words
    512K
  • Number of Bits/Word (bit)
    8
  • Data Rate Architecture
    SDR
  • Address Bus Width (bit)
    24
  • Number of Ports
    1
  • Timing Type
    Synchronous
  • Max. Access Time (ns)
    15
  • Maximum Clock Rate (MHz)
    45
  • Minimum Operating Supply Voltage (V)
    2.7
  • Typical Operating Supply Voltage (V)
    3.3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Operating Current (mA)
    20
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Supplier Temperature Grade
    Industrial
  • Mounting
    Surface Mount
  • Package Height
    1.5(Max)
  • Package Width
    3.9
  • Package Length
    4.9
  • PCB changed
    8
  • Standard Package Name
    SO
  • Supplier Package
    SOIC N
  • Pin Count
    8

Documentation and Resources

Datasheets
Design resources