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CY7C1383KV33133AXI|INFINEON|simage
CY7C1383KV33133AXI|INFINEON|limage
SRAM Chip

CY7C1383KV33-133AXI

SRAM Chip Sync Dual 3.3V 18M-bit 1M x 18 6.5ns 100-Pin TQFP Tray

Infineon Technologies AG
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    3A991b.2.b.
  • Part Status
    Active
  • HTS
    8542.32.00.41
  • Automotive
    No
  • PPAP
    No
  • Chip Density (bit)
    18M
  • Number of Words
    1M
  • Number of Bits/Word (bit)
    18
  • Architecture
    Flow-Through
  • Data Rate Architecture
    SDR
  • Address Bus Width (bit)
    3
  • Number of Ports
    2
  • Timing Type
    Synchronous
  • Max. Access Time (ns)
    6.5
  • Maximum Clock Rate (MHz)
    133
  • Process Technology
    65nm
  • Minimum Operating Supply Voltage (V)
    3.135
  • Typical Operating Supply Voltage (V)
    3.3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Operating Current (mA)
    129
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Supplier Temperature Grade
    Industrial
  • Packaging
    Tray
  • Mounting
    Surface Mount
  • Package Height
    1.4
  • Package Width
    14
  • Package Length
    20
  • PCB changed
    100
  • Standard Package Name
    QFP
  • Supplier Package
    TQFP
  • Pin Count
    100
  • Lead Shape
    Gull-wing

Documentation and Resources

Datasheets
Design resources