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CY7C1021D10ZSXIT|INFINEON|simage
CY7C1021D10ZSXIT|INFINEON|limage
SRAM Chip

CY7C1021D-10ZSXIT

SRAM Chip Async Single 5V 1M-bit 64K x 16 10ns 44-Pin TSOP-II T/R

Infineon Technologies AG
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    3A991b.2.b.
  • Part Status
    LTB
  • HTS
    8542.32.00.41
  • Automotive
    No
  • PPAP
    No
  • Chip Density (bit)
    1M
  • Number of Words
    64K
  • Number of Bits/Word (bit)
    16
  • Data Rate Architecture
    SDR
  • Address Bus Width (bit)
    16
  • Number of Ports
    1
  • Timing Type
    Asynchronous
  • Max. Access Time (ns)
    10
  • Process Technology
    90nm
  • Minimum Operating Supply Voltage (V)
    4.5
  • Typical Operating Supply Voltage (V)
    5
  • Maximum Operating Supply Voltage (V)
    5.5
  • Operating Current (mA)
    80
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Supplier Temperature Grade
    Industrial
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    1.04(Max)
  • Package Width
    10.26(Max)
  • Package Length
    18.52(Max)
  • PCB changed
    44
  • Standard Package Name
    SO
  • Supplier Package
    TSOP-II
  • Pin Count
    44
  • Lead Shape
    Gull-wing

Documentation and Resources

Datasheets
Design resources