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CDCP1803RGETG4|TI|simage
CDCP1803RGETG4|TI|limage
Clock Buffers and Drivers

CDCP1803RGETG4

Clock Divider/Fanout Buffer 3-OUT 1-IN 1:3 24-Pin VQFN EP T/R

Texas Instruments

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • Automotive
    No
  • PPAP
    No
  • Type
    Clock Divider/Fanout Buffer
  • Fanout
    1:3
  • Number of Outputs per Chip
    3
  • Maximum Input Frequency (MHz)
    800
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    0.6@3V to 3.6V
  • Absolute Propagation Delay Time (ns)
    0.6
  • Input Logic Level
    CML|HSTL|LVCMOS|LVDS|LVTTL|SSTL|VML
  • Output Logic Level
    LVPECL
  • Minimum Operating Supply Voltage (V)
    3
  • Typical Operating Supply Voltage (V)
    3.3
  • Maximum Operating Supply Voltage (V)
    3.6
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    0.95(Max)
  • Package Width
    4.15(Max)
  • Package Length
    4.15(Max)
  • PCB changed
    24
  • Standard Package Name
    QFN
  • Supplier Package
    VQFN EP
  • Pin Count
    24
  • Lead Shape
    No Lead

Documentation and Resources

Datasheets
Design resources