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CD4085BPWR|TI|simage
CD4085BPWR|TI|limage
Logic Gates

CD4085BPWR

AND-OR-Invert Gate 2-Element 2 Wide 2-IN 14-Pin TSSOP T/R

Texas Instruments

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    8542.39.00.90
  • SVHC
    Yes
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    CD4000
  • Logic Function
    AND-OR-Invert
  • Number of Elements per Chip
    2
  • Number of Element Inputs
    2 Wide 2-IN
  • Number of Output Enables per Element
    1
  • Number of Selection Inputs per Element
    0
  • Number of Element Outputs
    1
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    620@5V|250@10V|180@15V
  • Absolute Propagation Delay Time (ns)
    620
  • Output Type
    Push-Pull
  • Maximum Low Level Output Current (mA)
    4.2(Min)
  • Maximum High Level Output Current (mA)
    -4.2(Min)
  • Minimum Operating Supply Voltage (V)
    3
  • Typical Operating Supply Voltage (V)
    3.3|5|9|12|15
  • Maximum Operating Supply Voltage (V)
    18
  • Typical Quiescent Current (uA)
    0.04
  • Maximum Quiescent Current (uA)
    20
  • Propagation Delay Test Condition (pF)
    50
  • Minimum Operating Temperature (°C)
    -55
  • Maximum Operating Temperature (°C)
    125
  • Packaging
    Tape and Reel
  • Mounting
    Surface Mount
  • Package Height
    1.05(Max)
  • Package Width
    4.4
  • Package Length
    5
  • PCB changed
    14
  • Standard Package Name
    SO
  • Supplier Package
    TSSOP
  • Pin Count
    14
  • Lead Shape
    Gull-wing

Documentation and Resources

Datasheets
Design resources