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74LV08D112|NEXPERIA|simage
74LV08D112|NEXPERIA|limage
Logic Gates

74LV08D,112

AND Gate 4-Element 2-IN 14-Pin SO Tube

Nexperia
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Obsolete
  • HTS
    8542.39.00.01
  • Automotive
    Yes
  • PPAP
    Unknown
  • Logic Family
    LV
  • Logic Function
    AND
  • Number of Elements per Chip
    4
  • Number of Element Inputs
    2-IN
  • Number of Output Enables per Element
    0
  • Number of Selection Inputs per Element
    0
  • Number of Element Outputs
    1
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    45(Typ)@1.2V|15(Typ)@2V|11(Typ)@2.7V|9(Typ)@3.3V
  • Absolute Propagation Delay Time (ns)
    33
  • Output Type
    Push-Pull
  • Maximum Low Level Output Current (mA)
    12
  • Maximum High Level Output Current (mA)
    -12
  • Minimum Operating Supply Voltage (V)
    1
  • Typical Operating Supply Voltage (V)
    3.3
  • Maximum Operating Supply Voltage (V)
    5.5
  • Maximum Quiescent Current (uA)
    40
  • Propagation Delay Test Condition (pF)
    50
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    125
  • Packaging
    Tube
  • Mounting
    Surface Mount
  • Package Height
    1.5(Max)
  • Package Width
    4(Max)
  • Package Length
    8.75(Max)
  • PCB changed
    14
  • Standard Package Name
    SO
  • Supplier Package
    SO
  • Pin Count
    14

Documentation and Resources

Datasheets
Design resources