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74HCT11PW112|NEXPERIA|simage
74HCT11PW112|NEXPERIA|limage
Logic Gates

74HCT11PW,112

AND Gate 3-Element 3-IN 14-Pin TSSOP Bulk

Nexperia
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Obsolete
  • HTS
    COMPONENTS
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    HCT
  • Logic Function
    AND
  • Number of Elements per Chip
    3
  • Number of Element Inputs
    3-IN
  • Number of Output Enables per Element
    0
  • Number of Selection Inputs per Element
    0
  • Number of Element Outputs
    1
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    24@4.5V
  • Absolute Propagation Delay Time (ns)
    36
  • Maximum Low Level Output Current (mA)
    4
  • Maximum High Level Output Current (mA)
    -4
  • Minimum Operating Supply Voltage (V)
    4.5
  • Typical Operating Supply Voltage (V)
    5
  • Maximum Operating Supply Voltage (V)
    5.5
  • Maximum Quiescent Current (uA)
    2
  • Propagation Delay Test Condition (pF)
    50
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    125
  • Packaging
    Bulk
  • Mounting
    Surface Mount
  • Package Height
    1.05(Max)
  • Package Width
    4.5(Max)
  • Package Length
    5.1(Max)
  • PCB changed
    14
  • Standard Package Name
    SO
  • Supplier Package
    TSSOP
  • Pin Count
    14

Documentation and Resources

Datasheets
Design resources