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74HCT112PW112|NEXPERIA|simage
74HCT112PW112|NEXPERIA|limage
Flip Flops

74HCT112PW,112

Flip Flop JK-Type Neg-Edge 2-Element 16-Pin TSSOP Bulk

Nexperia
Datasheets 

Product Technical Specifications
  • EU RoHS
    Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Obsolete
  • HTS
    COMPONENTS
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    HCT
  • Logic Function
    JK-Type
  • Number of Channels per Chip
    2
  • Number of Elements per Chip
    2
  • Number of Element Inputs
    2
  • Number of Element Outputs
    1
  • Bus Hold
    No
  • Set/Reset
    Set/Reset
  • Polarity
    Inverting/Non-Inverting
  • Triggering Type
    Negative-Edge
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    40@4.5V
  • Absolute Propagation Delay Time (ns)
    60
  • Input Signal Type
    Single-Ended
  • Maximum Low Level Output Current (mA)
    6
  • Maximum High Level Output Current (mA)
    -6
  • Minimum Operating Supply Voltage (V)
    4.5
  • Typical Operating Supply Voltage (V)
    5
  • Maximum Operating Supply Voltage (V)
    5.5
  • Maximum Quiescent Current (mA)
    0.004
  • Propagation Delay Test Condition (pF)
    50
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    125
  • Packaging
    Bulk
  • Mounting
    Surface Mount
  • Package Height
    1.05(Max)
  • Package Width
    4.5(Max)
  • Package Length
    5.1(Max)
  • PCB changed
    16
  • Standard Package Name
    SO
  • Supplier Package
    TSSOP
  • Pin Count
    16
  • Lead Shape
    Gull-wing

Documentation and Resources

Datasheets
Design resources