복잡 프로그래머블 로직 장치 - CPLD

5M240ZM100I5N

CPLD MAX® VFamily 192Macro Cells 118.3MHz 1.8V 100-Pin MBGA Tray

Altera

제품 기술 사양

• 유럽 연합 RoHS 명령어

  Compliant

• 미국수출통제분류ECCN 인코딩

  EAR99

• 친환경 무연

  Active

• 미국 세관 상품 코드

  COMPONENTS

• Automotive

  No

• PPAP

  No

• Family Name

  MAX® V

• Logic Elements

  240

• Program Memory Type

  Flash

• Memory Size (Kbit)

  8

• Number of Logic Blocks/Elements

  24

• Number of Global Clocks

  4

• Number of I/O Banks

  2

• Number of Macro Cells

  192

• Data Gate

  No

• Maximum Number of User I/Os

  79

• In-System Programmability

  Yes

• Programmability

  Yes

• Reprogrammability Support

  Yes

• Maximum Internal Frequency (MHz)

  1474.9

• Maximum Internal Frequency (MHz)

  118.3

• Maximum Clock to Output Delay (ns)

  8.6

• Maximum Propagation Delay Time (ns)

  14, 8.5

• Speed Grade

  5

• Individual Output Enable Control

  Yes

• Minimum Operating Supply Voltage (V)

  1.71

• Maximum Operating Supply Voltage (V)

  1.89

• Typical Operating Supply Voltage (V)

  1.8

• I/O Voltage (V)

  1.2, 1.5, 1.8, 2.5, 3.3

• Tolerant Configuration Interface Voltage (V)

  5

• Minimum Operating Temperature (°C)

  -40

• Maximum Operating Temperature (°C)

  100

• Supplier Temperature Grade

  Industrial

• Packaging

  Tray

• Tradename

  MAX

• Mounting

  Surface Mount

• Package Height

  0.85

• Package Width

  6

• Package Length

  6

• PCB changed

  100

• Standard Package Name

  BGA

• Supplier Package

  MBGA

• Pin Count

  100

• Lead Shape

  Ball