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CD54HC73F3A|TI|simage
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Flip Flops

CD54HC73F3A

Flip Flop JK-Type Neg-Edge 2-Element 14-Pin CDIP Tube

Texas Instruments

Product Technical Specifications
  • EU RoHS
    Not Compliant
  • ECCN (US)
    EAR99
  • Part Status
    Active
  • HTS
    8542.39.00.70
  • SVHC
    Yes
  • SVHC Exceeds Threshold
    Yes
  • Automotive
    No
  • PPAP
    No
  • Logic Family
    HC
  • Logic Function
    JK-Type
  • Number of Channels per Chip
    2
  • Number of Elements per Chip
    2
  • Number of Element Inputs
    2
  • Number of Element Outputs
    1
  • Bus Hold
    No
  • Set/Reset
    Reset
  • Polarity
    Inverting/Non-Inverting
  • Triggering Type
    Negative-Edge
  • Maximum Propagation Delay Time @ Maximum CL (ns)
    160@2V|32@4.5V|28@6V
  • Absolute Propagation Delay Time (ns)
    240
  • Input Signal Type
    Single-Ended
  • Maximum Low Level Output Current (mA)
    5.2
  • Maximum High Level Output Current (mA)
    -5.2
  • Minimum Operating Supply Voltage (V)
    2
  • Typical Operating Supply Voltage (V)
    2.5|3.3|5
  • Maximum Operating Supply Voltage (V)
    6
  • Maximum Quiescent Current (mA)
    0.004
  • Propagation Delay Test Condition (pF)
    50
  • Minimum Operating Temperature (°C)
    -55
  • Maximum Operating Temperature (°C)
    125
  • Supplier Temperature Grade
    Military
  • Packaging
    Tube
  • Mounting
    Through Hole
  • Package Height
    3.56(Max)
  • Package Width
    7.19(Max)
  • Package Length
    19.94(Max)
  • PCB changed
    14
  • Standard Package Name
    DIP
  • Supplier Package
    CDIP
  • Pin Count
    14
  • Lead Shape
    Through Hole

Documentation and Resources

Datasheets
Design resources