복잡 프로그래머블 로직 장치 - CPLD

LC4064ZC-5TN100C

CPLD ispMACH® 4000ZFamily 64Macro Cells 200MHz 1.8V 100-Pin TQFP Tray

Lattice Semiconductor

产品技术规范

• 유럽 연합 RoHS 명령어

  Compliant

• 미국수출통제분류ECCN 인코딩

  EAR99

• 친환경 무연

  Active

• 미국 세관 상품 코드

  8542.31.00.55

• Automotive

  No

• PPAP

  No

• Family Name

  ispMACH® 4000Z

• Program Memory Type

  EEPROM

• Number of Logic Blocks/Elements

  36

• Number of Global Clocks

  4

• Number of I/O Banks

  2

• Number of Macro Cells

  64

• Product Terms

  80

• Data Gate

  No

• Maximum Number of User I/Os

  64

• In-System Programmability

  Yes

• Programmability

  Yes

• Reprogrammability Support

  Yes

• Maximum Internal Frequency (MHz)

  250

• Maximum Internal Frequency (MHz)

  200

• Maximum Clock to Output Delay (ns)

  4.2

• Maximum Propagation Delay Time (ns)

  5

• Speed Grade

  5

• Individual Output Enable Control

  Yes

• Minimum Operating Supply Voltage (V)

  1.7

• Maximum Operating Supply Voltage (V)

  1.95

• Typical Operating Supply Voltage (V)

  1.8

• Tolerant Configuration Interface Voltage (V)

  5

• Maximum Supply Current (mA)

  0.08(Typ)

• Minimum Operating Temperature (°C)

  0

• Maximum Operating Temperature (°C)

  90

• Supplier Temperature Grade

  Commercial

• Packaging

  Tray

• Tradename

  ispMACH

• Mounting

  Surface Mount

• Package Height

  1.4

• Package Width

  14

• Package Length

  14

• PCB changed

  100

• Standard Package Name

  QFP

• Supplier Package

  TQFP

• Pin Count

  100

• Lead Shape

  Gull-wing