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IS61WV51216EDBLL10TLI|ISSI|simage
IS61WV51216EDBLL10TLI|ISSI|limage
SRAM 芯片

IS61WV51216EDBLL-10TLI

SRAM Chip Async Single 2.5V/3.3V 8M-bit 512K x 16 10ns 44-Pin TSOP-II

Integrated Silicon Solution Inc
数据表 

产品技术规范
  • 欧盟RoHS指令
    Compliant
  • 美国出口管制分类ECCN编码
    3A991b.2.a.
  • 环保无铅
    Active
  • 美国海关商品代码
    8542.32.00.41
  • Automotive
    No
  • PPAP
    No
  • Chip Density (bit)
    8M
  • Number of Words
    512K
  • Number of Bits/Word (bit)
    16
  • Data Rate Architecture
    SDR
  • Address Bus Width (bit)
    19
  • Number of Ports
    1
  • Timing Type
    Asynchronous
  • Max. Access Time (ns)
    10
  • Minimum Operating Supply Voltage (V)
    2.4
  • Typical Operating Supply Voltage (V)
    3.3|2.5
  • Maximum Operating Supply Voltage (V)
    3.6
  • Operating Current (mA)
    55
  • Minimum Operating Temperature (°C)
    -40
  • Maximum Operating Temperature (°C)
    85
  • Supplier Temperature Grade
    Industrial
  • Mounting
    Surface Mount
  • Package Height
    1.05(Max) mm
  • Package Width
    10.29(Max) mm
  • Package Length
    18.52(Max) mm
  • PCB changed
    44
  • Standard Package Name
    SO
  • Supplier Package
    TSOP-II
  • Pin Count
    44
  • Lead Shape
    Gull-wing

文档和资源

数据表
设计资源