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IS61QDB22M18250M3L|ISSI|simage
IS61QDB22M18250M3L|ISSI|limage
SRAMチップ

IS61QDB22M18-250M3L

SRAM Chip Sync Dual 1.8V 36M-bit 2M x 18 0.45ns 165-Pin FBGA

Integrated Silicon Solution Inc
数据表 

产品技术规范
  • EU RoHS
    Compliant
  • ECCN (US)
    3A991b.2.a.
  • Part Status
    Obsolete
  • HTS
    8542.32.00.41
  • Automotive
    No
  • PPAP
    No
  • Chip Density (bit)
    36M
  • Number of Words
    2M
  • Number of Bits/Word (bit)
    18
  • Architecture
    Pipelined
  • Data Rate Architecture
    DDR
  • Address Bus Width (bit)
    20
  • Number of Ports
    2
  • Timing Type
    Synchronous
  • Max. Access Time (ns)
    0.45
  • Maximum Clock Rate (MHz)
    250
  • Minimum Operating Supply Voltage (V)
    1.71
  • Typical Operating Supply Voltage (V)
    1.8
  • Maximum Operating Supply Voltage (V)
    1.89
  • Operating Current (mA)
    700
  • Minimum Operating Temperature (°C)
    0
  • Maximum Operating Temperature (°C)
    70
  • Supplier Temperature Grade
    Commercial
  • Mounting
    Surface Mount
  • Package Height
    1.24(Max)
  • Package Width
    15
  • Package Length
    17
  • PCB changed
    165
  • Standard Package Name
    BGA
  • Supplier Package
    FBGA
  • Pin Count
    165
  • Lead Shape
    Ball

文档和资源

数据表
设计资源