Field Programmable Gate Arrays - FPGAs

EP1S60F1020C5

FPGA Stratix®Family 57120Cells 500MHz 1.5V 1020-Pin FC-FBGA Tray

Altera

产品技术规范

• RoHS (Unione Europea)

  Not Compliant

• ECCN (Stati Uniti)

  3A001a.7.a.

• Stato del componente

  Obsolete

• Codice HTS

  COMPONENTS

• Automotive

  No

• PPAP

  No

• Family Name

  Stratix®

• User I/Os

  773

• Number of I/O Banks

  8

• Operating Supply Voltage (V)

  1.5

• Shift Registers

  Utilize Memory

• Logic Elements

  57120

• Number of Multipliers

  144 (9x9)

• Program Memory Type

  SRAM

• Embedded Memory (Kbit)

  5092.9

• Total Number of Block RAM Memories

  6+292+574

• IP Core

  32/64-bit PCI-X bus Master/Target interface Core, 66/100/133Mhz|DI2CSB I2C Bus Interface-Slave|IFI Advanced CAN IP|PCI Express Cores|Video LVDS SerDes Transmitter / Receiver

• Provider Name

  Microtronix Inc/CAST, Inc/Northwest Logic, Inc/IFI/Digital Core Design/PLDA

• SERDES Channels

  30

• Device Logic Units

  57120

• Number of Global Clocks

  16

• Device Number of DLLs/PLLs

  12

• Dedicated DSP

  18

• Programmability

  No

• Reprogrammability Support

  No

• Copy Protection

  Yes

• Opr. Frequency (MHz)

  500

• In-System Programmability

  Yes

• Speed Grade

  5

• Differential I/O Standards

  LVDS|LVPECL|PCML

• Single-Ended I/O Standards

  LVTTL|LVCMOS

• Maximum I/O Performance

  840Mbps

• External Memory Interface

  ZBT SRAM|QDR II+SRAM|FCRAM|DDR SDRAM

• Minimum Operating Supply Voltage (V)

  1.425

• Maximum Operating Supply Voltage (V)

  1.575

• I/O Voltage (V)

  2.5|1.8|1.5|3.3

• Minimum Operating Temperature (°C)

  0

• Maximum Operating Temperature (°C)

  85

• Supplier Temperature Grade

  Commercial

• Packaging

  Tray

• Tradename

  Stratix

• Mounting

  Surface Mount

• Package Height

  3(Max)

• Package Width

  33

• Package Length

  33

• PCB changed

  1020

• Standard Package Name

  BGA

• Supplier Package

  FC-FBGA

• Pin Count

  1020

• Lead Shape

  Ball